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A Low Temperature Coefficient Time-to-Digital Converter with 1.3 ps Resolution Implemented in a 28 nm FPGA.

Xiangyu MaoFei YangFang WeiJiawen ShiJian CaiHaiwen Cai
Published in: Sensors (2022)
Keyphrases
  • data conversion
  • pipelined architecture
  • real time
  • high resolution
  • high speed
  • hardware implementation
  • fpga hardware
  • verilog hdl
  • multiresolution
  • low cost
  • low resolution
  • mathematical model