Dual-Line-Systolic Array for High Performance CNN Accelerator.
Peng XueLunshuai PanLitao SunMingqiang HuangPublished in: FCCM (2022)
Keyphrases
- systolic array
- reconfigurable architecture
- data flow
- parallel architecture
- cellular neural networks
- compute intensive
- convolutional neural network
- line segments
- high efficiency
- parallel implementation
- low cost
- primal dual
- special case
- high reliability
- field programmable gate array
- pattern recognition
- vanishing points
- intelligent agents