Login / Signup
Design and FPGA implementation of an 2D Gaussian surround function with reduced on-chip memory utilization.
M. C. Hanumantharaju
M. Ravishankar
D. R. Ramesh Babu
Published in:
ICACCI (2013)
Keyphrases
</>
fpga implementation
case study
low cost
hardware implementation
programmable logic
information systems
circuit design
image processing
high speed
fine grained
power dissipation
vlsi implementation
memory subsystem