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A lattice-based linear shift register synthesis for multisequences of varying length.

Li-Ping WangQuan-Long WangKun-Peng Wang
Published in: ISIT (2008)
Keyphrases
  • shift register
  • high speed
  • random number generator
  • hardware implementation
  • real time
  • program synthesis
  • machine learning
  • case study
  • least squares
  • data processing
  • processing units
  • random number