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Low-Jitter 0.1-to-5.8 GHz Clock Synthesizer for Area-Efficient Per-Port Integration.
Reza Molavi
Hormoz Djahanshahi
Rod Zavari
Shahriar Mirabbasi
Published in:
J. Electr. Comput. Eng. (2013)
Keyphrases
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high speed
data integration
data mining
low cost
data fusion
power consumption
real time
data sets
databases
learning algorithm
artificial intelligence
case study
small size