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Contention-Free High-Speed Clock-Gate based on Set/Reset Latch for Wide Voltage Scaling.
Min-Su Kim
Ah-Reum Kim
Yong-geol Kim
Chunghee Kim
Dong-Yeop Kim
Jong-Woo Kim
Daeseong Lee
Hyun Lee
Jungyul Pyo
Youngmin Shin
Jae Cheol Son
Published in:
ISCAS (2018)
Keyphrases
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high speed
low power
case study
power system
database
power consumption
probability distribution
data sets
information systems
control system