Login / Signup
Coupled variable-input LCG and clock divider-based large period pseudo-random bit generator on FPGA.
Mangal Deep Gupta
Rajeev K. Chauhan
Published in:
IET Comput. Digit. Tech. (2021)
Keyphrases
</>
pseudorandom
random number
uniformly distributed
high speed
random numbers
secret key
low cost
fpga device
user specific
signal processing
hardware implementation
power consumption
real time
em algorithm
field programmable gate array
input data
nearest neighbor
database systems
data sets