26TSPC: A Low Hold Time, Low Power Flip-Flop With Clock Path Optimization.

Kyounghun Kang Wanyeong Jung

Published in: ISCAS (2023)

Keyphrases

low power
power consumption
high speed
power dissipation
low power consumption
low cost
cmos technology
high power
digital signal processing
vlsi circuits
flip flops
vlsi architecture
single chip
wireless transmission
power reduction
mixed signal
image sensor
logic circuits
delay insensitive