An efficient hybrid learning algorithm for neural network-based speech recognition systems on FPGA chip.
Shing-Tai PanMin-Lun LanPublished in: Neural Comput. Appl. (2014)
Keyphrases
- speech recognition systems
- learning algorithm
- high speed
- speech recognition
- single chip
- low cost
- programmable logic
- low power consumption
- field programmable gate array
- neural network
- speech recognizer
- hardware implementation
- training data
- low power
- back propagation
- reconfigurable hardware
- machine learning
- power consumption
- parallel computing
- multi modal
- text classification
- signal processing
- hidden markov models
- similarity measure
- face recognition