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A 0.3 V 15 nW 69 dB SNDR Inverter-Based Δ∑ Modulator in 0.18 μm CMOS.
Lorenzo Benvenuti
Alessandro Catania
Mattia Cicalini
Andrea Ria
Massimo Piotto
Paolo Bruschi
Published in:
PRIME (2019)
Keyphrases
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high speed
power consumption
low cost
power supply
low power
control algorithm
single phase
circuit design
vlsi circuits
analog vlsi
sigma delta
delta sigma
image sensor
database
fuzzy controller
single chip
cmos technology
low voltage