Improving Security of SDDL Designs through Interleaved Placement on Xilinx FPGAs.
Rajesh VelegalatiJens-Peter KapsPublished in: FPL (2011)
Keyphrases
- field programmable gate array
- hardware implementation
- fpga implementation
- high speed
- security issues
- access control
- information security
- security requirements
- computer security
- security policies
- embedded systems
- security systems
- hardware design
- intrusion detection
- hardware software
- real time
- programmable logic
- security threats
- security analysis
- design space
- data mining