Design considerations for low power time-mode SAR ADC.
Hua FanXue HanSekedi B. KobengeQi WeiHuazhong YangPublished in: Int. J. Circuit Theory Appl. (2014)
Keyphrases
- low power
- design considerations
- single chip
- power consumption
- low cost
- high speed
- high power
- wireless transmission
- digital signal processing
- power reduction
- power dissipation
- logic circuits
- low power consumption
- sar images
- analog to digital converter
- vlsi circuits
- signal processor
- gate array
- delay insensitive
- mixed signal
- random access memory
- vlsi architecture
- pedagogical agents
- nm technology
- digital camera
- signal processing