Design of ternary D flip-flop using one latch with neuron-MOS literal circuit.

Xuanchang Zhou Guoqiang Hang

Published in: ICNC (2013)

Keyphrases

logic circuits
flip flops
power dissipation
low power
power consumption
cmos technology
chip design
digital signal processing
power reduction
high speed
low cost
design methodology
multiple input
case study
image processing
parallel processing
user interface