Optimal Parallel Hardware K-Sorter and Top K-Sorter, with FPGA Implementations.

Naoyuki Matsumoto Koji Nakano Yasuaki Ito

Published in: ISPDC (2015)

Keyphrases

parallel hardware
real time
genetic algorithm
query processing
dynamic programming
high speed
closed form
case study
objective function
optimal solution
optimal control
optimal design
data streams
signal processing
user defined
hardware architectures