Optimisation of an FPGA Credit Default Swap engine by embracing dataflow techniques.
Nick BrownMark KlaisoongnoenOliver Thomson BrownPublished in: CoRR (2021)
Keyphrases
- field programmable gate array
- parallel computing
- credit scoring
- hardware implementation
- high speed
- hardware design
- hardware architecture
- data flow
- design methodology
- genetic algorithm
- real time image processing
- parallel execution
- credit card
- graph cuts
- control flow
- credit risk
- hardware architectures
- systolic array
- parallel processing
- signal processing
- real time
- parallel hardware
- nonmonotonic inference
- single chip
- software implementation
- optimisation algorithm
- dedicated hardware
- air fuel ratio