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Secondary ESD clamp circuit for CDM protection of over 6 Gbit/s SerDes application in 40 nm CMOS.

Mototsugu OkushimaJunji Tsuruta
Published in: Microelectron. Reliab. (2013)
Keyphrases
  • high speed
  • database
  • decision support
  • low voltage
  • neural network
  • learning algorithm
  • low cost
  • low power
  • circuit design
  • cmos technology
  • analog vlsi
  • silicon on insulator