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Verilog-AMS-PAM: verilog-AMS integrated with parasitic-aware metamodels for ultra-fast and layout-accurate mixed-signal design exploration.

Geng ZhengSaraju P. MohantyElias KougianosOleg Garitselov
Published in: ACM Great Lakes Symposium on VLSI (2012)
Keyphrases
  • design rationale
  • metamodel
  • layout design
  • hardware designs
  • user interface
  • multi channel
  • modeling language