Fast center search algorithm with hardware implementation for motion estimation in HEVC encoder.
Ahmed MedhatAhmed ShalabyMohammed Sharaf SayedMaha ElsabroutyFarhad MehdipourPublished in: ICECS (2014)
Keyphrases
- hardware implementation
- motion estimation
- rate constrained
- video compression
- search algorithm
- video codec
- rate distortion
- low complexity
- video coding
- motion compensated
- inter frame
- motion compensation
- coding efficiency
- efficient implementation
- signal processing
- reference frame
- motion vectors
- dedicated hardware
- video sequences
- image processing algorithms
- software implementation
- block matching
- hardware design
- optical flow
- image sequences
- fpga implementation
- motion field
- video coding standard
- macroblock
- spatial domain
- bit rate
- hardware architecture
- pipeline architecture
- low bit rate
- field programmable gate array
- search range
- computer vision
- video quality
- parallel architecture
- distributed video coding
- video encoder
- fpga device
- computational complexity
- general purpose processors
- transform domain
- coding scheme
- variable block size
- image quality
- machine learning