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Low Power Design through Frequency-Optimized Runtime Micro-Architectural Adaptation.
Jianqi Chen
Benjamin Carrión Schäfer
Published in:
ICCD (2019)
Keyphrases
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low power
low cost
single chip
high speed
vlsi architecture
power consumption
low power consumption
logic circuits
digital signal processing
cmos technology
gate array
power dissipation
software architecture
real time
high power
power reduction
mixed signal
high frequency
ultra low power
application specific