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A Run-Time System for Partially Reconfigurable FPGAs: The case of STMicroelectronics SPEAr board.

George CharitopoulosDionisios N. PnevmatikatosMarco D. SantambrogioKyprianos PapadimitriouDanilo Pau
Published in: PARCO (2015)
Keyphrases
  • field programmable gate array
  • general purpose
  • databases
  • low cost
  • neural network
  • real world
  • case base
  • hardware implementation
  • compute intensive