FPGA/DSP-based Configurable Multi-Channel Counter.
Daniele AudinoFederico BarontiAndrea LazzeriRoberto RoncellaRoberto SalettiPublished in: DSD (2007)
Keyphrases
- multi channel
- verilog hdl
- digital signal processing
- systolic array
- real time image processing
- signal processing
- digital signal
- high speed
- field programmable gate array
- anti aliasing
- data flow
- hardware implementation
- digital signal processors
- image processing
- digital signal processor
- low power
- single channel
- mac protocol
- parallel architecture
- low power consumption
- real time
- data broadcast
- channel assignment
- wireless networks
- low cost
- pattern recognition
- feature extraction