Binary to Quaternary Encoding in Clocked CMOS Circuits Using Weak Buffer.
Debashis BhattacharyaPublished in: ISMVL (1990)
Keyphrases
- low power
- analog vlsi
- high speed
- delay insensitive
- encoding schemes
- circuit design
- cmos technology
- vlsi circuits
- logic circuits
- power consumption
- low cost
- power dissipation
- binary representation
- encoding scheme
- bit string
- floating gate
- chip design
- random access memory
- focal plane
- single chip
- mixed signal
- non binary
- gray code
- power supply
- fractal image compression
- image sensor
- asynchronous circuits
- analog circuits
- real time
- constraint satisfaction problems
- motion estimation
- neural network