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Communication-Aware Module Placement for Power Reduction in Large FPGA Designs.
Kalindu Herath
Alok Prakash
Udaree Kanewala
Thambipillai Srikanthan
Published in:
ISVLSI (2018)
Keyphrases
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power reduction
power consumption
low power
multithreading
power saving
high speed
data acquisition
power dissipation
signal processing
computer networks
communication networks
verilog hdl
pattern recognition
computational power
parallel computing