TSD: hierarchical time slack distribution for ultra-low power CMOS VLSI.
Kyu-won ChoiAbhijit ChatterjeePublished in: ISLPED (2002)
Keyphrases
- ultra low power
- low power
- high speed
- single chip
- vlsi circuits
- low cost
- probability distribution
- vlsi design
- uniformly distributed
- signal processing
- power consumption
- cmos image sensor
- hierarchical clustering
- image sequences
- analog vlsi
- power dissipation
- power supply
- image sensor
- hierarchical model
- spatial distribution
- real time
- coarse to fine
- hierarchical structure
- data distribution
- loss function