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Bit error rates of flip-flop operations with AND gate functionality using a 1.55-µm polarization bistable VCSEL.
Daisuke Hayashi
Kazuya Nakao
Takeo Katayama
Hitoshi Kawaguchi
Published in:
IEICE Electron. Express (2015)
Keyphrases
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bit error rate
multiple input
flip flops
wireless channels
computer simulation
signal to noise ratio
image processing
power consumption
multipath
cmos technology
dynamic logic
channel errors