Systolic Array Architectures for 1-D Discrete Hartley Transform.

Bijan Karimi Taraneh Baradaran-Seyed

Published in: Applied Informatics (1994)

Keyphrases

hartley transform
systolic array
reconfigurable architecture
fourier transform
discrete cosine transform
data flow
fast fourier transform
parallel architecture
row column
discrete fourier transform
neural network
signal processing
image compression
frequency domain
pairwise
wavelet transform