An Implementation of a World Grid Square Codes Generator on a RISC-V Processor.

Rei Watanabe Jubee Tada Keiichi Sato

Published in: CANDAR (Workshops) (2021)

Keyphrases

instruction set
computer architecture
computation intensive
floating point
high speed
efficient implementation
application specific
real time
graphics processing units
memory management
shared memory multiprocessors
cell broadband engine architecture