Power Efficient Design of High-Performance Convolutional Neural Networks Hardware Accelerator on FPGA: A Case Study With GoogLeNet.
Ahmed J. Abd El-MaksoudMohamed EbbedAhmed H. KhalilHassan MostafaPublished in: IEEE Access (2021)
Keyphrases
- field programmable gate array
- low power consumption
- hardware design
- power consumption
- embedded systems
- hardware architecture
- low cost
- real time
- single chip
- case study
- parallel architectures
- hardware implementation
- low power
- fpga device
- programmable logic
- digital signal processing
- chip design
- power reduction
- fpga technology
- cost effective
- low latency
- data acquisition
- convolutional neural networks
- hw sw
- ibm power processor
- signal processor
- computational power
- verilog hdl
- hardware description language
- high speed
- control unit
- software implementation
- hardware and software
- parallel computing