A Compaction Method for Full Chip VLSI Layouts.
Joseph DaoNobu MatsumotoTsuneo HamaiChusei OgawaShojiro MoriPublished in: DAC (1993)
Keyphrases
- high accuracy
- neural network
- pairwise
- high precision
- preprocessing
- optimization algorithm
- significant improvement
- high speed
- support vector machine
- detection method
- dynamic programming
- synthetic data
- segmentation method
- optimization method
- classification method
- fully automatic
- support vector machine svm
- computationally efficient
- computational cost
- experimental evaluation
- cost function
- multiresolution
- evolutionary algorithm
- objective function
- similarity measure
- image sequences