A Configurable Multi-ported Register File Architecture for Soft Processor Cores.
Mazen A. R. SaghirRawan NaousPublished in: ARC (2007)
Keyphrases
- multi core architecture
- multi core processors
- level parallelism
- multi processor
- parallel architecture
- processor core
- central processing unit
- instruction set
- data flow
- database
- high speed
- general purpose processors
- content addressable
- file management
- management system
- real time
- design considerations
- processing elements
- software architecture
- input output
- multicore processors
- single instruction multiple data