High performance hardware architecture for constrained one-bit transform based motion estimation.
Anil ÇelebiOguzhan UrhanPublished in: EUSIPCO (2011)
Keyphrases
- hardware architecture
- motion estimation
- hardware implementation
- xilinx virtex
- hardware architectures
- video coding
- motion compensation
- optical flow
- motion vectors
- motion compensated
- video sequences
- inter frame
- processing elements
- video compression
- reference frame
- spatial domain
- associative memory
- block matching motion estimation
- field programmable gate array
- signal processing
- computational complexity
- computer vision
- genetic algorithm
- rate distortion