Reconfigurable Network-on-Chip for 3D Neural Network Accelerators.

Arash Firuzan Mehdi Modarressi Masoud Daneshtalab Midia Reshadi

Published in: NOCS (2018)

Keyphrases

neural network
network on chip
interconnection networks
field programmable gate array
low cost
routing algorithm
single chip
computing systems
hardware implementation
network simulator
fuzzy neural network
multistage
multi processor
general purpose
message passing
fault tolerant
shortest path