FPGA-based hardware implementation of chaotic opposition-based arithmetic optimization algorithm.
Aymen ZermaniGhaith ManitaAmit ChhabraElyes FekiAbdelkader MamiPublished in: Appl. Soft Comput. (2024)
Keyphrases
- optimization algorithm
- hardware implementation
- pipelined architecture
- multi objective
- field programmable gate array
- hardware design
- hardware architecture
- optimization method
- efficient implementation
- differential evolution
- signal processing
- software implementation
- image processing algorithms
- particle swarm optimization pso
- dedicated hardware
- fpga implementation
- optimization strategy
- global optima
- evolutionary multi objective
- hybrid optimization algorithm
- image binarization
- pipeline architecture
- artificial bee colony
- floating point
- memory management
- general purpose
- evolutionary algorithm
- parallel architecture
- real time
- control parameters
- multi objective optimization
- hybrid algorithm
- honey bee
- image processing
- general purpose processors
- genetic algorithm
- neural network