A Low Power 8-Bit Asynchronous SAR ADC Design Using Charge Scaling DAC.
Anush BekalManish GoswamiB. R. SinghDipankar PalPublished in: ISED (2014)
Keyphrases
- low power
- single chip
- analog to digital converter
- high speed
- low power consumption
- power consumption
- low cost
- vlsi architecture
- power dissipation
- logic circuits
- digital signal processing
- delay insensitive
- gate array
- cmos technology
- mixed signal
- ultra low power
- shift register
- wireless transmission
- power reduction
- high power
- design considerations
- cmos image sensor