Iterative-Gradient Based Complex Divider FPGA Core with Dynamic Configurability of Accuracy and Throughput.
F. Javier López-MartínezEduardo del Castillo-SánchezJosé T. EntrambasaguasEduardo Martos-NayaPublished in: J. Signal Process. Syst. (2011)
Keyphrases
- high accuracy
- response time
- highly dynamic
- computational cost
- dynamic environments
- data sets
- training data
- field programmable gate array
- high speed
- prediction accuracy
- complex systems
- computational efficiency
- real time image processing
- hardware design
- changing environment
- high precision
- quality of service
- sensor networks
- classification accuracy
- high level
- neural network