An adaptive low-power receiver architecture for IEEE 802.15.4 standard.
Maico Cassel dos SantosLuigi CarroPublished in: I2MTC (2014)
Keyphrases
- low power
- vlsi architecture
- power consumption
- low cost
- high speed
- mixed signal
- cmos technology
- high power
- wireless transmission
- low power consumption
- digital signal processing
- logic circuits
- vlsi circuits
- real time
- signal processor
- single chip
- nm technology
- delay insensitive
- power reduction
- low complexity
- gate array
- physical layer
- power dissipation
- image sensor
- image processing