8.8 An 8.2-to-10.3Gb/s full-rate linear reference-less CDR without frequency detector in 0.18μm CMOS.

Sui Huang Jun Cao Michael M. Green

Published in: ISSCC (2014)

Keyphrases

high speed
power consumption
low cost
closed form
low power
low frequency
circuit design
real time
computer vision
detection algorithm
false positives
linear systems
linear constraints
power supply
interest point detectors
analog vlsi