An Approach for Solving SAT/MaxSAT-Encoded Formal Verification Problems on FPGA.

Kenji Kanazawa Tsutomu Maruyama

Published in: IEICE Trans. Inf. Syst. (2017)

Keyphrases

formal verification
solving problems
sat solving
combinatorial optimization
sat solvers
np complete problems
optimization problems
upper bound
np complete
model checking
boolean satisfiability
search algorithm
domain independent
model checker
sat encodings
symbolic model checking