Low Power Decoder Architecture of Product Code for Storage Controller.
Sumin KimByungmin AhnBohwan JunMankeun SeoHongrak SonYong Ho SongPublished in: ISOCC (2022)
Keyphrases
- low power
- vlsi architecture
- high speed
- power consumption
- low cost
- low density parity check
- real time
- mixed signal
- cmos technology
- single chip
- low complexity
- nm technology
- logic circuits
- digital signal processing
- storage devices
- vlsi implementation
- low power consumption
- vlsi circuits
- power dissipation
- image sensor
- error concealment
- gate array
- signal processor
- data flow
- ultra low power
- turbo codes
- reed solomon
- ldpc codes
- file system
- motion estimation