Sparse-YOLO: Hardware/Software Co-Design of an FPGA Accelerator for YOLOv2.
Zixiao WangKe XuShuaixiao WuLi LiuLingzhi LiuDong WangPublished in: IEEE Access (2020)
Keyphrases
- field programmable gate array
- hardware software co design
- hardware implementation
- embedded systems
- parallel computing
- hardware and software
- image processing algorithms
- hw sw
- hardware software
- hardware design
- computing systems
- massively parallel
- image processing
- information systems
- fuzzy logic
- neural network
- prediction model
- efficient implementation
- low cost
- general purpose