Design and implementation of a shared buffer architecture for a gigabit Ethernet packet switch.

Stephen O'Kane Sakir Sezer Ciaran Toal

Published in: SoCC (2005)

Keyphrases

gigabit ethernet
design considerations
architectural design
design methodology
high speed
hardware design
hardware architecture
efficient implementation
packet switching
software architecture
buffer size
parallel algorithm
high throughput
hardware implementation
switched networks