Symbolic verification of timed asynchronous hardware protocols.
Krishnaji DesaiKenneth S. StevensJohn O'LearyPublished in: ISVLSI (2013)
Keyphrases
- asynchronous circuits
- hardware designs
- low cost
- petri net
- hardware and software
- model checking
- cryptographic protocols
- real time
- state machines
- timed automata
- computer systems
- protocol specification
- colored petri nets
- verification method
- symbolic representation
- application level
- embedded systems
- high level
- computing power
- binary decision diagrams
- communication protocols
- symbolic data
- hardware software
- delay insensitive
- finite state machines
- parallel hardware
- data acquisition
- formal analysis
- signature verification
- discrete event
- discussion forums
- field programmable gate array
- formal methods
- face verification
- online discussion
- computing systems
- hardware implementation
- peer to peer
- image processing