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A low-kickback-noise and low-voltage latched comparator for high-speed folding and interpolating ADC.
Guohe Zhang
Bo Wang
Feng Liang
Zhibiao Shao
Published in:
IEICE Electron. Express (2008)
Keyphrases
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low voltage
high speed
low power
cmos technology
power line
design considerations
signal to noise ratio
frame rate
real time
computer vision
image processing
digital images
object oriented
power management