Efficient Hardware Design for Computing Pairings Using Few FPGA In-built DSPs.
Riadh BrinciWalid KhmiriMefteh MbarekAbdellatif Ben RabaaAmmar BouallèguePublished in: IACR Cryptol. ePrint Arch. (2015)
Keyphrases
- hardware design
- field programmable gate array
- hardware implementation
- fpga hardware
- parallel architectures
- digital signal processors
- programmable logic
- parallel computing
- hardware software
- fpga implementation
- massively parallel
- real time
- pairwise
- computing systems
- embedded systems
- signal processing
- data analysis
- high level
- machine learning