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High-speed demonstration of low-power 1 k-bit shift-register memories using LR-biasing SFQ circuits.
Toshihiro Takahashi
Ryo Numaguchi
Yuki Yamanashi
Nobuyuki Yoshikawa
Published in:
IEICE Electron. Express (2016)
Keyphrases
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shift register
high speed
low power
high power
single chip
logic circuits
low power consumption
real time
frame rate
digital signal processing
power reduction
vlsi architecture
computer vision
vlsi circuits
cmos technology
power dissipation
mixed signal
multiresolution
multiscale