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A 2.0Gb/s clock-embedded interface for full-HD 10b 120Hz LCD drivers with 1/5-rate noise-tolerant phase and frequency recovery.

Koichi YamaguchiYoshihiko HoriKeiichi NakajimaKazumasa SuzukiMasayuki MizunoHiroshi Hayama
Published in: ISSCC (2009)
Keyphrases
  • noise tolerant
  • high speed
  • noisy data
  • instance based learning algorithms
  • frame rate
  • learning algorithm
  • evolutionary computation
  • small number
  • semi supervised learning