From signal temporal logic to FPGA monitors.
Stefan JaksicEzio BartocciRadu GrosuReinhard KloibhoferThang NguyenDejan NickovicPublished in: MEMOCODE (2015)
Keyphrases
- temporal logic
- signal processing
- model checking
- digital signal
- modal logic
- satisfiability problem
- concurrent systems
- verification method
- hardware implementation
- belief revision
- transition systems
- temporally extended
- computation tree logic
- field programmable gate array
- linear temporal logic
- dynamic constraints
- temporally extended goals
- mazurkiewicz traces
- reactive systems
- bounded model checking
- search algorithm
- formal verification
- first order logic
- domain specific