Extended dynamic voltage scaling for low power design.
Bo ZhaiDavid T. BlaauwDennis SylvesterKrisztián FlautnerPublished in: SoCC (2004)
Keyphrases
- low power
- power consumption
- single chip
- low cost
- high speed
- low power consumption
- gate array
- vlsi architecture
- logic circuits
- digital signal processing
- mixed signal
- power dissipation
- design process
- cmos technology
- power reduction
- power system
- delay insensitive
- energy dissipation
- vlsi circuits
- cmos image sensor
- nm technology
- video sequences