Reliable GALS Implementation of MPEG-4 Encoder with Mixed Clock FIFO on Standard FPGA.
Ari KulmalaTimo D. HämäläinenMarko HännikäinenPublished in: FPL (2006)
Keyphrases
- high speed
- hardware implementation
- mpeg standard
- fpga device
- advanced video coding
- video codec
- hardware design
- efficient implementation
- iso iec
- parallel architecture
- software implementation
- power reduction
- fpga hardware
- multimedia
- fpga technology
- mpeg avc
- international standard
- field programmable gate array
- low complexity
- bit rate
- low cost