High-definition event frame generation using SoC FPGA devices.
Krzysztof BlachutTomasz KryjakPublished in: CoRR (2023)
Keyphrases
- high definition
- hd video
- real time
- video coding
- embedded systems
- video communication
- rate control algorithm
- low power consumption
- motion imagery
- high resolution
- multimedia processing
- field programmable gate array
- low power
- mpeg avc
- low cost
- reconfigurable hardware
- hardware and software
- signal processing
- event detection
- hardware implementation
- hardware software co design
- video frames
- hardware software
- reference frame
- power consumption
- e learning
- machine learning